Functional areas on an integrated circuits (IC) chip operate in synchronism with one another in accordance with a clock signal. The clock signal is distributed to the functional areas at the same timing using a method called clock mesh or clock tree. The clock mesh method involves arrangement of wiring for the clock signal in a mesh form on the IC chip. The clock tree method involves provision of a plurality of medium areas each consisting of a group of a plurality of small areas and can receive a signal simultaneously. A relay circuit provided in each medium area supplies a signal to the small areas simultaneously.
With the recently improved functions of IC chips, it may be necessary that the functional areas operate at different clock frequencies. In this case, with both the clock mesh and tree methods, clock signal wiring is required for each of the clocks with different frequencies.
Further, the increased speeds of ICs have also increased the frequencies of clock signals. Thus, at present, the time required for one cycle (cycle time) of a clock signal is very short. In addition, with the improvement of techniques for manufacturing IC chips, semiconductor elements provided on the IC chip have reduced sizes. Thus, there is a long distance between the functional areas. This increases the time required for a signal to move from one position to another on the IC chip.
With the reduction in the cycle time of a clock signal and the increase in the distance between two positions, it has become difficult to deliver a certain kind of signal to positions on the IC chip simultaneously. Such signals include a reset signal. The reset signal must reach all the parts of the IC chip simultaneously. However, for the above reasons, a plurality of cycles of the clock signal may be required for the reset signal to reach a certain position. Thus, the arrival time of the reset signal may vary depending on the position on the IC chip. This may cause the functional areas to shift to an operative state at different timing, thus leading the IC chip to malfunction.
To solve this problem, it is possible to provide a reset signal having a tree structure or to insert the same number of flip-flops connected in series, in each path for the reset signal to the corresponding functional area. A method for providing a reset signal having a tree structure is the same as the clock signal. This requires the setting of the number and positions of relay circuits for an IC chip. Thus, a very long time is required to design both the clock and reset signals having a tree structure.
With the method of inserting flip-flops, the number of flip-flops in each reset signal path is set equal to that in the reset signal path via which the reset signal requires the longest time to reach the functional area. This allows the reset signal to reach the functional areas simultaneously. However, this method requires the prediction of the time needed for the reset signal to reach each functional area without using any flip-flops and the insertion of a number of flip-flops based on the predicted time. Consequently, it is difficult to design the structure. Further, this method requires a large number of flip-flops unnecessary for the essential operation of the IC chip to increase manufacturing costs.